Part Number Hot Search : 
2KA16 0000X 680MZ LVC1G IC16F AN1293 SD204 C74HC3
Product Description
Full Text Search
 

To Download MAX12005 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  _______________________________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. MAX12005 satellite if switch 19-5554; rev 1; 10/11 + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed paddle. ordering information general description the MAX12005 satellite if switch ic is designed for multi-user applications supporting two quad universal low-noise blocks (lnbs) to be matrix switched to four satellite receivers. the system can be easily expanded to accept 16 satellite if inputs using the cascade option and one additional satellite if switch ic. a configuration of eight satellite if inputs to eight satellite receivers is also possible by using two ics and adding eight input splitters. the insertion loss of these splitters can be com - pensated by a +6db or +12db input gain select. there are two ways to control the switch function. each ic contains four diseqc k 2.0 decoders and four alternate tone/voltage decoders. the decoders use an integrated trimmed oscillator, simplifying the MAX12005 implementation into any system. there are four opera - tional modes, which include lnb mode (for use within the lnb), cascade master mode, cascade slave mode, and single mode. the satellite if switch is designed on an advanced sige process and is available in a lead-free 48-pin tqfn surface-mount package (7mm x 7mm). applications direct broadcast satellite receivers satellite if distribution l-band distribution features s 8-input-to-4-output matrix switch s expandable to 16 inputs with cascade master/ slave option s 950mhz to 2150mhz operation s greater than 30db switch isolation s 0/+6/+12db input stage gain selection to compensate for splitter insertion loss gain step for all input stages is commonly controlled through an analog select pin s four integrated diseqc 2.0 decoders with integrated oscillator s alternate tone/voltage detection s esd protected to 2kv hbm diseqc is a trademark of eutelsat. evaluation kit available part temp range pin-package MAX12005etm+ -40 n c to +85 n c 48 tqfn-ep*
MAX12005 satellite if switch 2 stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd .......................................................... -0.3v to +3.6v rfin1Crfin8 to gnd ........................................... -0.3v to +1.5v cascade_in1Ccascade_in4 to gnd .............. -0.3v to +1.5v rfout1Crfout4 to gnd ....................... -0.3v to (v cc + 0.3v) diseqc_tx1Cdiseqc_tx4 to gnd ......... -0.3v to (v cc + 0.3v) diseqc_rx1Cdiseqc_rx4 to gnd ........ -0.3v to (v cc + 0.3v) gain_select, mode_select to gnd ................................................... -0.3v to (v cc + 0.3v) continuous power dissipation (t a = +70 n c) tqfn (derate 27.8 mw/ n c above +70 n c) .................. 2.2w operating ambient temperature range ........... -40 n c to +85 n c maximum junction temperature ..................................... +150 n c storage temperature range ............................ -65 n c to +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c dc electrical characteristics (v cc = +3.0v to +3.5v, t a = -40 n c to +85 n c, mode set to master, input gain stages set to highest gain, inputs matched to 75 i , output loads = 75 i . typical values are at +3.3v and at t a = +25 n c, unless otherwise noted.) (note 1) absolute maximum ratings caution! esd sensitive device parameter symbol conditions min typ max units supply voltage v cc 3.0 3.5 v supply current i cc v cc = 3.3v, 0db, one input selected, four outputs selected 150 250 ma +12db gain_select input high- level voltage v ih v cc - 0.4v v +6db gain_select input voltage level and range v in 1/2 v cc q 200mv mv 0db gain_select input low-level voltage v il 0.4 v single mode_select input high- level voltage v ih v cc - 0.4v v master mode_select input voltage level and range v in 2/3 v cc q 200mv mv slave mode_select input voltage level and range v in 1/3 v cc q 200mv mv lnb mode_select input low-level voltage v il 0.4 v gain_select and mode_select input current i in v in = v cc 10 f a dc voltage detect input high level v ih (note 2) 1.23 v dc voltage detect input low level v il (note 2) 1.11 v diseqc_rx_ input current i in v in = high or low 1 f a diseqc_tx_ output high-level voltage v oh i load = -1ma v cc - 0.4v v diseqc_tx_ output low-level voltage v ol i load = +1ma 0.4 v
MAX12005 satellite if switch 3 ac electrical characteristics (MAX12005 ev kit, v cc = +3.0v to +3.5v, f in = 950mhz, v in = 70db f v, t a = -40 n c to +85 n c, mode set to master, input gain stages set to 0db, rf inputs matched to 75 i , rf output loads = 75 i . typical values are at +3.3v and at t a = +25 n c, unless otherwise noted.) (note 1) note 1: production tested at +25 n c; guaranteed by design and characterization at -40 n c and +85 n c. note 2: to supply the specified input-voltage-detect levels requires the use of a voltage-divider comprised of 12.7k i and 1.02k i q 0.5% tolerance resistors. the voltage being divided is expected to be v ol = 14.75v maximum and v oh = 16.75v minumum. note 3: the common input gain step is set by analog control. all gain measurements have only one output connect to each input. switch gain measurements do not include cascade inputs as part of the switch signal path. note 4: switch-to-switch gain match is defined as each switch to every other switch gain match. each switch must be set up with the same input gain step. note 5: 60mv p-p square wave for f in = 22khz. for sine wave, the typical minimum is 100mv p-p . parameter symbol conditions min typ max units operation frequency f rf 950 2150 mhz diseqc_rx_ tone input level v in f in = 22khz (note 5) 60 mv p-p switch gain at 950mhz (note 3) 0db gain 0 db +6db gain +6 +12db gain +12 cascade input switch gain at 950mhz |s 21| 0 db switch-to-switch gain match d |s 21 | at 950mhz (note 4) -1.5 +3.5 db gain slope with frequency between 950mhz and 2150mhz +3 db single-input source gain change gain change from single output con - nected to a single input to four outputs connected to a single input -0.4 db 3rd-order intermodulation product (case 1) im3 output level set to +89db f v by varying three equal amplitude tones at 955mhz, 962mhz, and 965mhz; measure products at 952mhz and 958mhz -35 dbc 3rd-order intermodulation product (case 2) im3 output level set to +89db f v by varying three equal amplitude tones at 2135mhz, 2142mhz, and 2145mhz; measure prod - ucts at 2132mhz and 2138mhz -34 dbc rfin1Crfin8 input return loss |s 11 | -12 db cascade_in1Ccascade_in4 input return loss |s 11 | -12 db rfout1Crfout4 output return loss |s 22 | -12 db switch isolation 55 db port-to-port isolation 33 db diseqc clock f osc 8 mhz
MAX12005 satellite if switch 4 typical operating characteristics (MAX12005 ev kit, v cc = +3.0v to +3.5v, f in = 950mhz, v in = 70db f v, t a = -40 n c to +85 n c, mode set to master, input gain stages set to 0db, rf inputs matched to 75 i , rf output loads = 75 i . typical values are at +3.3v and at t a = +25 n c, unless otherwise noted. production tested at +25 n c; guaranteed by design and characterization at -40 n c and +85 n c.) voltage vs. current (0db gain) MAX12005 toc01 voltage (v) current (ma) 3.5 3.4 3.3 3.2 3.1 3.0 140 160 180 200 120 2.9 3.6 t a = +85c t a = +25c t a = -40c voltage vs. gain (+25c) MAX12005 toc02 voltage (v) gain (db) 3.5 3.4 3.3 3.2 3.1 3.0 -3 -2 -1 0 1 2 -4 2.9 3.6 2150mhz 1550mhz 950mhz s21 +25c (0db gain, var. in/out) MAX12005 toc03 frequency (hz) magnitude (db) 1.95e+09 1.75e+09 1.15e+09 1.35e+09 1.55e+09 -3 -2 -1 0 1 2 3 4 -4 9.5e+08 2.15e+09 s21 +85c (0db gain, var. in/out) MAX12005 toc04 frequency (hz) magnitude (db) 1.95e+09 1.75e+09 1.15e+09 1.35e+09 1.55e+09 -3 -2 -1 0 1 2 3 4 -4 9.5e+08 2.15e+09 s21 -40c (0db gain, var. in/out) MAX12005 toc05 frequency (hz) magnitude (db) 1.95e+09 1.75e+09 1.15e+09 1.35e+09 1.55e+09 -3 -2 -1 0 1 2 3 4 -4 9.5e+08 2.15e+09 rf s11 (var. input) MAX12005 toc06 frequency (hz) magnitude (db) 1.95e+09 1.75e+09 1.15e+09 1.35e+09 1.55e+09 -35 -40 -30 -25 -20 -15 -10 -5 -50 9.5e+08 2.15e+09 -45 rf s22 (var. output) MAX12005 toc07 frequency (hz) magnitude (db) 1.95e+09 1.75e+09 1.15e+09 1.35e+09 1.55e+09 -35 -40 -30 -25 -20 -15 -10 -5 -50 9.5e+08 2.15e+09 -45 port-to-port isolation (var. ports) MAX12005 toc08 frequency (hz) isolation (db) 1.95e+09 1.75e+09 1.15e+09 1.35e+09 1.55e+09 -80 -70 -60 -50 -40 -30 -20 -10 -90 9.5e+08 2.15e+09 switch isolation (var. ch) MAX12005 toc09 isolation -75 -70 -65 -60 -55 -50 -45 -40 -35 -30 -80 frequency (hz) 1.95e+09 1.75e+09 1.15e+09 1.35e+09 1.55e+09 9.5e+08 2.15e+09
MAX12005 satellite if switch 5 pin configuration pin description top view tqfn 13 14 15 16 17 18 19 20 21 22 23 24 rfin7 gnd rfin8 gnd cascade_in1 gnd cascade_in2 gnd cascade_in3 gnd cascade_in4 gnd 48 47 46 45 44 43 42 41 40 39 38 37 1 2 34 5 67 89 10 11 12 gain_select mode_select v cc v cc gnd rfout1 v cc gnd rfout2 v cc gnd rfout3 gnd rfin6 gnd rfin5 gnd rfin4 gnd rfin3 gnd rfin2 gnd rfin1 36 35 34 33 32 31 30 29 28 27 26 25 diseqc_tx4 diseqc_rx4 diseqc_tx3 diseqc_rx3 diseqc_tx2 diseqc_rx2 diseqc_tx1 diseqc_rx1 v cc rfout4 gnd v cc MAX12005 + pin name function 1 rfin1 rf input from lnb 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 35, 38, 41, 44 gnd electrical ground 3 rfin2 rf input from lnb 5 rfin3 rf input from lnb 7 rfin4 rf input from lnb 9 rfin5 rf input from lnb 11 rfin6 rf input from lnb 13 rfin7 rf input from lnb 15 rfin8 rf input from lnb 17 cascade_in1 cascade input from rf output of second MAX12005 in slave mode 19 cascade_in2 cascade input from rf output of second MAX12005 in slave mode 21 cascade_in3 cascade input from rf output of second MAX12005 in slave mode 23 cascade_in4 cascade input from rf output of second MAX12005 in slave mode
MAX12005 satellite if switch 6 pin description (continued) pin name function 25 diseqc_tx4 return diseqc signal output to satellite receiver (master) or outputs envelope of received diseqc signal for use by external controller 26 diseqc_rx4 input for diseqc slave signal from satellite receiver or master 27 diseqc _tx3 return diseqc signal output to satellite receiver (master) or outputs envelope of received diseqc signal for use by external controller 28 diseqc _rx3 input for diseqc slave signal from satellite receiver or master 29 diseqc _tx2 return diseqc signal output to satellite receiver (master) or outputs envelope of received diseqc signal for use by external controller 30 diseqc _rx2 input for diseqc slave signal from satellite receiver or master 31 diseqc _tx1 return diseqc signal output to satellite receiver (master) or outputs envelope of received diseqc signal for use by external controller 32 diseqc _rx1 input for diseqc slave signal from satellite receiver or master 33, 36, 39, 42, 45, 46 v cc 3.0v to 3.5v supply. analog supply pins 33, 36, 39, and 42. digital supply pins 45 and 46. 34 rfout4 rf output to satellite receiver 37 rfout3 rf output to satellite receiver 40 rfout2 rf output to satellite receiver 43 rfout1 rf output to satellite receiver 47 mode_select satellite switch mode select 48 gain_select gain select for all input stages ep exposed pad ground. the exposed pad must be soldered to the circuit board for prop - er thermal and electrical performance.
MAX12005 satellite if switch 7 functional diagram 33, 36, 39, 42, 45 rfin1 1 3 5 7 rfin2 rfin3 rfin4 rfin5 rfin6 rfin7 rfin8 9 11 13 15 0/+6/+12db 9:1 mux 9:1 mux 9:1 mux port switch control diseqc_tx1 cascade_in1 cascade_in2 diseqc 2.0 diseqc 2.0 voltage/ tone detector voltage/ tone detector diseqc 2.0 voltage/ tone detector diseqc 2.0 voltage/ tone detector 31 17 19 21 23 32 29 30 27 28 2, 4, 6, 8, 10, 12, 14, 18, 20, 22, 24, 35, 38, 41, 44 25 26 diseqc_rx1 diseqc_tx2 diseqc_rx2 diseqc_tx3 diseqc_rx3 diseqc_tx4 diseqc_rx4 control logic v cc mode_select gain_select 46 34 37 40 43 rfout1 satellite if switch v cc rfout2 rfout3 rfout4 8mhz oscillator gnd frequency out 9:1 mux 47 48 16 gnd MAX12005 cascade_in3 cascade_in4
MAX12005 satellite if switch 8 detailed description the MAX12005 satellite if switch features eight 75 i inputs with three selectable gain steps of 0, +6db, and +12db. each of the eight input amplifiers feeds into four nine-to-one multiplexers with the switching controlled by voltage/tone or diseqc signaling from up to four receivers. the output of each multiplexer is then sent to a satellite receiver through a 75 i buffered output stage. the satellite if switch has four modes of operation. two modes are used to increase the number of if inputs by cascading two MAX12005 ics together. the first ic is set to master mode to enable the four cascade inputs. the second ic is set to slave mode with its outputs connected to the cascade inputs of the master ic. the lnb mode sets up the ic to recognize lnb diseqc signaling to control switching and ignore diseqc signaling for multiswitch applications. the single mode sets up the ic to recognize multiswitch diseqc signaling to control switching and ignore lnb diseqc signaling. for the lnb, single, and slave modes, the four cascade inputs are disabled. input gain select the voltage supplied to the gain_select pin provides the selection for one of three gain settings available at all eight input stages, as follows: gnd = 0db 1/2 v cc = +6db v cc = +12db the +6db gain step voltage can be set through the use of a simple supply voltage-divider. this gain select feature is intended to compensate for input signal losses due to the use of input rf signal splitters. chip mode select the voltage supplied to the mode_select pin provides the selection for one of four ic operational modes, as follows: gnd = lnb mode 1/3 v cc = slave mode (cascade operation) 2/3 v cc = master mode (cascade operation) v cc = single mode the slave mode and master mode voltages can be set through the use of simple supply voltage-dividers. switch control voltage/tone signaling is the default switch control after power-up or when a receiver is connected or recon - nected with the die power on. after an individual decoder receives a diseqc signal, that decoder switches from voltage/one control to diseqc control until a new receiver connection is made or when the ic has a power-on reset. layout considerations to minimize coupling between different sections of the ic, a star power-supply routing configuration with a large decoupling capacitor at a central v cc node is recom - mended. the v cc traces branch out from this node, each going to a separate v cc node in the circuit. place a bypass capacitor as close as possible to each sup - ply pin. this arrangement provides local decoupling at each v cc pin. use at least one via per bypass capacitor for a low-inductance ground connection. do not share the capacitor ground vias with any other branch. the MAX12005 ev kit can be used as a starting point for layout. for best performance, take into consideration grounding and routing of rf, baseband, and power- supply pcb proper line. make connections from vias to the ground plane as short as possible. on the high- impedance ports, keep traces short to minimize shunt capacitance. ev kit schematic and gerber files can be found at www.maxim-ic.com . spi is a trademark of motorola, inc.
MAX12005 satellite if switch 9 diseqc slave control interface the diseqc interface is designed according to the diseqc bus functional specification version 4.2. all framing bytes 0xe0 through 0xe7 are supported. the following address bytes are supported: 0x00 any device 0x10 any lnb, switcher, or smatv 0x11 lnb 0x14 switcher, dc-blocking figure 1. typical cascade connection between two satellite switch ics rfin1 sat a, low, vertical to sat receiver 1 primary device rfout1 rfout2 cascade1 cascade2 cascade3 cascade4 rfout3 rfout4 to sat receiver 2 to sat receiver 3 to sat receiver 4 sat a, low, horizonta l sat a, high, vertical sat a, high, horizonta l sat b, low, vertical sat b, low, horizonta l sat b, high, vertical sat b, high, horizonta l rfin2 rfin3 rfin4 rfin5 rfin6 rfin7 rfin8 rfin1 sat c, low, vertical secondary device rfout1 rfout2 cascade1 cascade2 cascade3 cascade4 rfout3 rfout4 sat c, low, horizonta l sat c, high, vertical sat c, high, horizonta l sat d, low, vertical sat d, low, horizonta l sat d, high, vertical sat d, high, horizonta l rfin2 rfin3 rfin4 rfin5 rfin6 rfin7 rfin8
MAX12005 satellite if switch 10 table 1. diseqc slave control interface note 1: the primary device outputs connect directly to the satellite receivers. the secondary device outputs connect to the primary device through the cascade inputs. also see figure 1. note 2: only those diseqc commands that differ between sequences have to be sent to change the input, not all four commands. by default rfin1 from the primary device is selected. the diseqc interface is designed according to the diseqc bus functional specification version 4.2. table 1 shows the coherence between the terms used by the diseqc standard and the pin names used by the MAX12005 along with the command sequences used to control switching. table 2 lists the supported command bytes. the com - mand byte is the 3.byte in the diseqc master frame (refer to the diseqc bus functional specification ver - sion 4.2, top of page 13). the diseqc slave only sends a reply if requested by a framing byte 0xe2 or 0xe3 in the master frame (refer to diseqc bus functional specification version 4.2, bottom of page 13). all diseqc commands control the contents of the diseqc registers described in chapter 7.1. table 3 lists the supported command bytes. the diseqc commands are internally mapped to individually named registers. the registers do not have an address. device (note 1) input signal from diseqc command sequence (note 2) primary rfin1 satellite a, low band, vertical polarization 0x23, 0x22, 0x20, 0x21 rfin2 satellite a, low band, horizontal polarization 0x23, 0x22, 0x20, 0x25 rfin3 satellite a, high band, vertical polarization 0x23, 0x22, 0x24, 0x21 rfin4 satellite a, high band, horizontal polarization 0x23, 0x22, 0x24, 0x25 rfin5 satellite b, low band, vertical polarization 0x23, 0x26, 0x20, 0x21 rfin6 satellite b, low band, horizontal polarization 0x23, 0x26, 0x20, 0x25 rfin7 satellite b, high band, vertical polarization 0x23, 0x26, 0x24, 0x21 rfin8 satellite b, high band, horizontal polarization 0x23, 0x26, 0x24, 0x25 secondary rfin1 satellite c, low band, vertical polarization 0x27, 0x22, 0x20, 0x21 rfin2 satellite c, low band, horizontal polarization 0x27, 0x22, 0x20, 0x25 rfin3 satellite c, high band, vertical polarization 0x27, 0x22, 0x24, 0x21 rfin4 satellite c, high band, horizontal polarization 0x27, 0x22, 0x24, 0x25 rfin5 satellite d, low band, vertical polarization 0x27, 0x26, 0x20, 0x21 rfin6 satellite d, low band, horizontal polarization 0x27, 0x26, 0x20, 0x25 rfin7 satellite d, high band, vertical polarization 0x27, 0x26, 0x24, 0x21 rfin8 satellite d, high band, horizontal polarization 0x27, 0x26, 0x24, 0x25
MAX12005 satellite if switch 11 table 2. diseqc slave control interface command bytes hex value command function data bytes slave reply 0x00 reset reset diseqc decoder framing byte 0x01 clr reset clear reset flag clears status_reg, bit 0 framing byte 0x04 set contend set contention flag sets status_reg, bit 7 framing byte 0x05 contend return address only if contention flag is set reads address_reg framing + data byte 0x06 clr contend clear contention flag clears status_reg, bit 7 framing byte 0x07 address return address unless contention flag is set reads address_reg framing + data byte 0x08 move c change address only if contention flag is set writes to address_reg 1 byte framing byte 0x09 move change address unless contention flag is set writes to address_reg 1 byte framing byte 0x10 status read status register flags reads status_reg framing + data byte 0x11 config read configuration flags reads configuration_reg framing + data byte 0x14 switch 0 read switching state flags reads switch_reg framing + data byte 0x20 set lo select the low local oscillator frequency clears switch_reg, bit 4 framing byte 0x21 set vr select vertical polarization (or right circular) clears switch_reg, bit 5 framing byte 0x22 set pos a select satellite position a (or position c) clears switch_reg, bit 6 framing byte 0x23 set s0a select switch option a (i.e. positions a/b) clears switch_reg, bit 7 framing byte 0x24 set hi select the high local oscillator frequency sets switch_reg, bit 4 framing byte 0x25 set hl select horizontal polarization (or left circular) sets switch_reg, bit 5 framing byte 0x26 set pos b select satellite position b (or position d) sets switch_reg, bit 6 framing byte 0x27 set s0b select switch option b (i.e. positions c/d) sets switch_reg, bit 7 framing byte 0x30 sleep ignore all bus commands except awake sets status_reg, bit 1 framing byte 0x31 awake respond to future bus commands normally clears status_reg, bit 1 framing byte
MAX12005 satellite if switch 12 table 2. diseqc slave control interface command bytes (continued) table 3. diseqc slave control interface registers note 1: refer to diseqc bus functional specification version 4.2, page 18. note 2: refer to diseqc bus functional specification version 4.2, page 22. hex value command function data bytes slave reply 0x38 write n0 write to port group 0 controls switch_reg, bits 7 downto 4 (note 1) 1 byte framing byte 0x50 lo string read current frequency reads low_lof_reg2/1 or high_lof_reg2/1 depending on switch_reg, bit 4 (note 2) framing + 2 data bytes 0x51 lo now read current frequency table entry number reads low_lof_reg0, bit 3 downto 0 or high_lof_reg0, bit 3 downto 0 depending on switch_reg, bit 4 framing + data byte 0x52 lo lo read low-frequency table entry number reads low_lof_reg0, bit 3 downto 0 framing + data byte 0x53 lo hi read high-frequency table entry number reads high_lof_reg0, bit 3 downto 0 framing + data byte address bit acc name function default address_reg 7:0 rw address diseqc address lnb: 0x11 switch: 0x14 status_reg 7 rw contention bus contention flag 0 6 r standby standby mode 0 5 unused 4 r aux_power auxiliary power available 0 3 unused 2 rw voltage 0 = low dc, 1 = high dc depends on voltage input 1 rw sleep 0 = awake, 1 = sleep 0 0 rw reset reset flag 1 configuration_reg 7 r analog analog output facility 0 6 r standby standby facility 0 5 r positioner positioner capability 0 4 r power_detection external power-detection capability 0 3 r loop_through loopthrough facility 0 2 r polarizer polarizer capability 0 1 r switch switcher capability 1 0 r lof_values lof value output capability 1
MAX12005 satellite if switch 13 table 3. diseqc slave control interface registers (continued) package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. chip information process: bicmos package type package code outline no. land pattern no. 48 tqfn t4877+4 21-0144 90-0130 address bit acc name function default switch_reg 7 rw option 0 = positions a/b, 1 = positions c/d 0 6 rw satellite 0 = satellite a(c), 1 = satellite b(d) 0 5 rw polarization 0 = vertical, 1 = horizontal 0 4 rw band 0 = low band, 1 = high band 0 3 rw option_switchable options switch available depends on cascade input 2 r satellite_switchable satellite switch available 1 1 r polarization_switchable polarization switch available 1 0 r band_switchable band switch available 1 low_lof_reg_2 7:4 r low_10ghz low lof value, 10ghz digit 0000 3:0 r low_1ghz 1ghz digit 1001 low_lof_reg_1 7:4 r low_100mhz 100mhz digit 0111 3:0 r low_10mhz 10mhz digit 0101 low_lof_reg_0 7:4 r low_1mhz 1mhz digit 0000 3:0 r low_table_entry table entry number 0010 high_lof_reg_2 7:4 r high_10ghz high lof value, 10ghz digit 0001 3:0 r high_1ghz 1ghz digit 0000 high_lof_reg_1 7:4 r high_100mhz 100mhz digit 0110 3:0 r high_10mhz 10mhz digit 0000 high_lof_reg_0 7:4 r high_1mhz 1mhz digit 0000 3:0 r high_table_entry table entry number 0100
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. 14 maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. MAX12005 satellite if switch revision history revision number revision date description pages changed 0 9/10 initial release 1 11/11 added note 5 to electrical characteristics table 3


▲Up To Search▲   

 
Price & Availability of MAX12005

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X